1. Technical Field
The present disclosure relates to a wiring structure, a semiconductor package including a wiring structure, a method of making the wiring structure and a method of making the semiconductor package. The present disclosure relates to a wiring structure including a dummy structure that can provide for improving a plating uniformity of the wiring structure.
2. Description of the Related Art
It can be desirable to miniaturize semiconductor devices, in some implementations. Miniaturization of semiconductor devices can provide for improved device performance and reduced device manufacturing cost. Fine line design in wiring structures of semiconductor devices are an example of such miniaturization. A wiring structure of a fine line design can include conductive traces and conductive lands. A width of a conductive land can, in some implementations, range from about 15 micrometers (μm) to about 200 μm, which can be greater than a width of a conductive trace in a range from about 2 μm to about 10 μm. After plating of the wiring structure is completed, a dielectric layer or a passivation layer can be formed on the wiring structure to cover the conductive traces and conductive lands. An opening can subsequently be formed in the dielectric layer or the passivation layer to expose the conductive lands.
The fine line wiring design can be complicated and challenging. In particular, plating uniformity can be an issue of concern for a wiring structure during a manufacturing process. In some implementations, the plating uniformity is controlled to within 10% (e.g. an amount of plating for each of two or more areas on which plating is implemented differs between respective areas by no more than 10% of the average thickness of the plating of the two or more areas). If a width of a conductive land is much greater than a width of a conductive trace, during a plating process, a rate of deposition of metal ions of a plating solution on conductive lands will be higher than a rate of deposition of metal ions on conductive traces. As a result, a thickness of a conductive land can be greater than a thickness of a conductive trace, which may form a thickness gap (a difference in thickness). The thickness gap can have at least two significant impacts on a wiring structure. One is that stress may be focused on a corner or junction of conductive lands and conductive traces, so that the wiring structure is subject to a risk of cracking of the conductive traces. A second potential impact is, if a thickness of the wiring structure is thin, for example, a thickness of conductive traces is about 2 μm for at least some industrial implementations, during plating, a thickness of conductive lands can grow to about 4 μm or more, and, if a dielectric layer or a passivation layer with an approximately 4 μm thickness is provided, the dielectric layer or passivation layer may not fully cover the conductive lands, which can lead to electrical problems of the wiring structure, such as leakage.
Furthermore, if a relatively thicker dielectric layer, passivation layer or a stacked multi-layer passivation is used to cover the wiring structure, a thickness of the dielectric layer or passivation layer disposed on the conductive land is increased. Thus, the entire wiring structure can become thicker and may not meet some thickness specifications (e.g. some industrial standard specifications) of the wiring structure. The whole wiring design may need to be modified and changed.